Siemens extends leadership in EDA design-for-test with the launch of Tessent RTL Pro
Summary
Siemens’ Tessent software helps customers meet this need by enabling the analysis and insertion of a large majority of their DFT logic very early in the design flow, performing quick synthesis and then running ATPG (automatic test pattern generation) to identify and address outlier blocks and take appropriate measures. “The ability to provide our back-end and verification teams with the same, complete design view containing all Tessent IP, including VersaPoint test points in RTL, is paramount for our competitiveness." Tessent RTL Pro’s "shift-left" functionality also helps enhance the ability of third-party tools to optimize area and timing when adding DFT logic prior to synthesis, leaving only scan insertion for the gate level. In addition, RTL Pro generates design files that work with any downstream synthesis or verification flows, without requiring a closed-flow process. Siemens software and the comprehensive digital twin enable companies to optimize their design, engineering and manufacturing processes to turn todays ideas into the sustainable products of the future.
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