100,000 P/E cycles reached
Summary
But with increasing demands for greater endurance thresholds in applications such as 5G O-RAN and edge computing switches, the market was hungry for more – while still recognising the paramount importance of cost-effectiveness. Apacer’s crack team of firmware experts tackled the problem and were able to tweak the technology to deliver 100,000 P/E cycles. Careful cell distribution management of the 3D TLC structure was necessary in order to correctly adjust the voltage delta and charge sensing. Furthermore, powered by carefully selected industrial grade NAND components, the firmware structure is specifically optimised to enhance NAND flash stability during daily operations, and the error handling algorithm is significantly improved to avoid any unexpected ECC errors. Gaming, surveillance, edge computing and 5G smart IoT operations will all benefit from the increase in endurance.