Coding to the SED API: Part 3
Summary
In the last article on this topic, we did a dive into the main routine of the lt_loop JTAG-based On-Target Diagnostic, seeing the overall flow of the program. In this article, we’ll look at the routine that does the heavy lifting for retraining the PCI Express link and checking for errors. Looking at the source code of the entire program as found in Part 1, we can see that much of the “heavy lifting” happens in the lt_loop(int mHandle, uint32_t bus, uint32_t device, uint32_t function) routine. Note that it makes use of some of the key register definitions as defined early in the program: The PCIe register definitions such as REG_LNKSTS are found in the Intel EDS; but, in lieu of that, a lot of the underlying methodology is common to all x86 platforms and in the public domain, such as here: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-processor-s1200-datasheet-vol-2.pdf. "); Note at the top that we retrieve lnksts using the function readRegisterPeci as opposed to a standard JTAG/MMIO read.
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