SoC & ASIC Designers to Benefit Greatly From Multiple HES Proto-AXI™ Enhancements
Summary
HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA, ASIC and SoC designs, has enhanced its HES Proto-AXI™ software to provide even greater support to designers using the company’s HES™ pre-silicon prototyping solution for hardware verification and software validation. The enhancements include support for QEMU (the open source machine emulator and virtualizer) and SystemC TLM version 2.0, plus resources that increase the interoperability of HES Proto-AXI™ with third party tools. “The addition of QEMU is of immense benefit,” says Zibi Zalewski, General Manager of Aldec’s Hardware Division. “QEMU emulates a CPU subsystem which can generate AXI transactions for the design or algorithm kernel running in a HES board. The interface can also be used during simulation when the application is under development.” Of equal benefit is support for the latest version of SystemC TLM.
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