Altera Supports JEDEC’s Approval of Standard Test and Programming Language (STAPL)

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STAPL is a vendor- and platform-independent language for programming ISP-capable PLDs from a variety of vendors, via the IEEE standard 1149.1 interface (commonly known as JTAG). The approval of STAPL is the result of a year-and-a-half of work by leaders in the silicon, test, programming and systems arenas and includes revisions created in direct response to input received during the JEDEC standardization process. Altera has had a long history of supporting open, public standards, including EDIF, LPM, Verilog, VHDL, and SDF. The STAPL standardization effort began when the Jam programming and test language was introduced by a consortium of companies in July of 1997, and submitted to the JEDEC subcommittee JC 42.1 in September of 1997. The Jam programming language supports ISP PLDs from Altera, Cypress, Lattice, Vantis, and Xilinx.

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