Blue Pearl Software to Showcase Visual Verification Suite 2019 at the Design Automation Conference
Summary
The suite features HDL Creator™ smart editor, Analyze™ RTL advanced static and formal linting, an integrated debug environment, enhanced Clock Domain Crossing (CDC) analysis and automated SDC generation. “We have been using Blue Pearl Softwares Analyze RTL for many years to help us internally verify our commercial IP offerings,” said Brian Small, Senior Design Engineer, Northwest Logic. Our customers are RTL managers and developers, in military, aerospace, semiconductor, medical, communications and safety critical design companies. The Visual Verification™ Suite speeds block and project level verification with advanced integrated RTL structural and formal linting, constraint generation and clock domain crossing analysis. *Free 6-month HDL Creator license is limited to qualified active FPGA or ASIC students, designers or managers and will be provided within two weeks following DAC.
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