Virtual Silicon and UMC Group Collaborate on NVM Technology

▤ Summary

The technology lets systems-on-chip (SOC) designers to embed flash and EEPROM in UMCs baseline 0.25-micron and 0.18-micron CMOS logic manufacturing processes. It is a combination of technology from Dr. John Caywood and development guidance from Fairchild Semiconductor Corp. The technology, in conjunction with UMCs standard logic process, is applicable in a wide range of markets, including portable computing and wireless communications. It features low-density program storage with smart cards, re-programmable logic and programmable IP blocks. In other company news, Greg Spadea joined Virtual Silicon as vice president of technology.

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