RISC-V Foundation Showcases Continued Momentum and Growth at Embedded World 2019
Summary
The RISC-V Foundation is also hosting a scavenger hunt across the show floor, challenging attendees to visit different booths in the RISC-V ecosystem for the chance to win a prize. The main conference program will also feature a variety of RISC-V sessions, including a full day of RISC-V talks on Feb. 26 and a half-day RISC-V Workshop on Feb. 27, chaired by Cesare Garlati at the prpl Foundation and Hex Five Security. How to Build a RISC-V Embedded System In Just 30 Minutes When: 9:30 – 10:30 CET Who: Cesare Garlati, prpl Foundation and Hex Five Security; Drew Barbier, SiFive Opportunities and Risks in Open Source Processors When: Noon – 13:00 CET Who: Cesare Garlati, prpl Foundation and Hex Five Security; Markus Levy, NXP Semiconductors; Ted Marena, Western Digital; Tim Whitfield, Arm Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.The RISC-V Foundation, a non-pinnovation.