AMD extends FPGA portfolio with AMD Spartan UltraScale

▤ Summary

Delivering cost and power-efficient performance for a wide range of I/O-intensive applications at the edge, Spartan UltraScale+ devices offer the industry’s highest I/O to logic cell ratio in FPGAs built in 28nm and lower process technology, deliver up to 30% lower total power consumption versus the previous generation, and contain the most robust set of security features in the AMD Cost-Optimised Portfolio. “Building on proven 16nm technology, the Spartan UltraScale+ family’s enhanced security and features, common design tools, and long product lifecycles further strengthen our market-leading FPGA portfolio and underscore our commitment to delivering cost-optimised products for customers.” Spartan UltraScale+ FPGAs are optimised for the edge, delivering high I/O counts and flexible interfaces which allow the FPGAs to seamlessly integrate and efficiently interface with multiple devices or systems to address the explosion of sensors and connected devices. The family offers the industry’s highest I/O to logic cell ratio of FPGAs built on 28nm and below process technology, with up to 572 I/Os and voltage support up to 3.3V, enabling any-to-any connectivity for edge sensing and control applications. The proven 16nm fabric and support for a wide array of packaging, starting as small as 10x10mm, provide high I/O density in an ultra-compact footprint. The extensive AMD FPGA portfolio also provides the scalability to start with cost-optimised FPGAs and continue through to midrange and high-end products.

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AMD

$25M to $50M