SD/SDIO 3.0 host controller IP core
Summary
SD cards are used in thousands of products, including digital cameras, smartphones & tablets, and other portable devices. The built-in 2KB data buffer enables efficient communication with the host processor at low interrupt latency. Key features of the SD/SDIO Host Controller are: • Support for the following UHS –I modes of operations ensure compatibility with any card available in the market. • The IP architecture leverages power management techniques, making it ideal for low-power applications • Low latency and high bandwidth for best system performance • Support for a wide range of standards enables system flexibility for embedded and extended storage • The IP ensures compatibility with previous and next generation SD standards The SD Host Controller IP is developed in Verilog HDL and validated on multiple FPGA platforms including Xilinx, Intel, Lattice, and Microchip. The SD Host Controller IP is available in two variants • FPGA vendors support bare-metal SD drivers on their soft cores to configure the registers using the AXI4-lite interface, while the AXI4-MM interface is used for data transfer in DMA mode • Bare-metal SD driver supports the SD card initialization and basic write/read operations required for proving the IP functionality • Linux SD driver running on the Arm cores supported by SOC devices will configure the registers using the AXI4-lite interface and the AXI4-MM interface is used for the data transfer in DMA mode • User can perform all operations such as mount, patriation, and other operations supported by the standard Linux driver iWave offers a complete IP solution for its SD/SDIO Host Controller IP consisting of RTL code or netlist, synthesis scripts, test environments, and comprehensive documentation, all backed by its world-class customer support.